模拟集成电路中的频率补偿(5)

relatively low Vdsat can reduce the drastic change of

voltage at the output of the first stage, decreasing or

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egligible at the frequencies of interest. Also the noise n

contribution of cascode transistors M5 and M6 is less significant. Hence, the analysis mainly focuses on the noise contribution of Rb, M7, M8, and M9 as the noise of transistors M1, M2, M3, and M4 can be easily referred to the input stage, using an equivalent input-referred voltage noise source. The input-referred noise transfer functions of the noise sources: Rb, M7, M8 and M9, are respectively given by,

11s11s

Cbgm7gm7

22

An,M81s225gm8gm1

#

a11s

2Cb

1211sRCbpb

gm7

#Av1s22 (23)

gm7Rb11Cb

11s

gm7

2Cb

111sRbCpb2

go81sCp8gm7

#An,M91s2025#Av1s202

gm1gm7Rb11Cb

11s

gm7

(24)

a11s

An, Rb1s2025gm8gm1

#

1gm7 Rb112Cb

#Av1s22 (21)

An,M71s225gm8gm1

11sRbCb

##Av1s22 (22)

gm7Rb11Cb

11s

gm7

where Av(s) is the transfer function of the proposed am-plifier. From eqs. (21)–(24), it can be observed that the noise due to Rb, M7 and M8 generates the major portion of the thermal noise within the GBW of the amplifier, while the noise contribution of M9 is suppressed by the gain of the first stage.

38 IEEE CIRCUITS AND SYSTEMS MAGAZINE

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E. Simulation Results

The overall performance of the OpAmp has been veri-fied in 0.35-mm CMOS under a 1.5-V supply. To demon-strate the effectiveness of the proposed CM, the OpAmp has been tested under a wide range of large capacitive loads. Table 1 summarizes the component sizes of the OpAmp. With a biasing current set to 1.5 mA and all other drain currents shown in Fig. 11(a), the total c

urrent consumption is 31.5 mA. During the simula-tion, Rb, and Cb have been tuned to 85 kV, and 0.8 pF respectively, to achieve an effective Miller capacitance of 7.9 pF with gmb 5 128 mS. The other parameters (gm1, gm9 and gm10) are 61 mS, 43 mS, and 45 mS, respective-ly. The value of Cbat is chosen to be 0.5 pF which is much larger than the total gate-capacitance of M10 (~13 fF). Cd is close to 0.6 pF to implement a highly stable OpAmp for a broad range of load capacitance ($50 pF). A small diode-connected PMOS transistor MR with source and substrate terminal connected behaves like an extremely high resistor. Fig. 14 shows the frequency responses of the OpAmp with CL = 50 pF, 500 pF, 5 nF, and 50 nF. The PM is larger than 50° for all cases. The corresponding transient responses are shown in Fig. 15 indicating that the proposed OpAmp is very stable without any oscil-lation and ringing when the input is stimulated by a 500-mV step. To validate the robustness of the OpAmp

FIRST QUARTER 2011

against process corners (slow-slow, typical-typical and

fast-fast), a 150-pF load is adopted. It can be observed from the AC [Fig. 16] and step [Fig. 17] responses that the proposed OpAmp is also very stable with little per-formance variations.

A performance summary obtained with the variation of the capacitive load from 50 pF up to 50 nF is given in Table 2. For CL . 50 nF, the OpAmp becomes more stable from the above analysis although the UGF is sig-nificantly reduced.

V. Potential CM and Other Frequency Techniques Extending Wide-Range Capacitive Driving CapabilityAmong the existing Miller compensation techniques, Miller compensation with current buffer (MCCB) fea-tures the highest potential to lead further improvement of two-stage OpAmp in driving a large or wide-range ca-pacitive load. However, one drawback of this topology is that the gain of the first stage strongly relies on the size of the compensation capacitor Cm . CM techniques have been employed here to reduce the physical size of Cm . But, the proposed CM still possesses two high-frequency poles and thus further smaller load capacitance cannot be handled. If more sophisticated CMs without parasitic poles or with just one very high-frequency pole are pro-posed, a large-range capacitive-load stable OpAmp with

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high power-and-area efficiency can be accomplished. Alternatively, if a zero-pole pair or lead network could be inserted in the forward path of the OpAmp, the UGF of the local feedback loop can be further improved. The extended bandwidth can be utilized to save the power of the 2nd stage and enhance its capacitive driving ca-pability. The following sub-sections describe these two of the capacitive load can be increased, providing that the poles induced by the lead network are located at suf-ficient high frequencies beyond gmc/Cc. The realization (passive or active) of the lead network determines the efficiency of the technique in practice.

VI. Summary

techniques and their associated challenges:

A. Sophisticated CM Without

Parasitic Poles or With Only One

High-Frequency Pole in the Local Loop

Fig. 18 describes a two-stage OpAmp using MCCB in conjunction with a sophisticated CM. In a sophisticated CM, if there is no parasitic pole, the two-stage OpAmp is able to handle any value of load capacitance with k-fold smaller Ca in comparison with the pure MCCB OpAmp, as shown in the gain plot Fig. 19. A parasitic pole associ-ated with gma and Ca is induced by the sophisticated CM. When compared with the pure MCCB OpAmp, this pole is pushed to a high-frequency position due to the reduced value of Ca. This structure is superior to the previously proposed CM because that has an extra high-frequency pole. The extra pole is the prime cause for instability when the load capacitance is greatly decreased. For in-stance, even a 10° reduction in PM of the local loop leads to a great amount of peaking in the tran …… 此处隐藏：6316字，全部文档内容请下载后查看。喜欢就下载吧 ……