模拟集成电路中的频率补偿(2)

Yin5

Iin

V5s1Av112C. (1)in

Figure 3(c) shows the idea of another method that exploits a current-controlled current source (CCCS) in parallel with C to directly increase the current flowing into the input. Since the current gain of the CCCS is K, the equivalent capacitance is determined by the follow-ing equations,

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in5V5s1K112C 1 Ceq51K112C. (2)in

The method depending on a VCVS is usually called a voltage-mode capacitor multiplier (V-CM) while the other relying on a CCCS is termed as a current-mode ca-pacitor multiplier (C-CM) as the embodiments of a VCVS and a CCCS are corresponding to voltage and current amplifiers, respectively.B. CM Realization

1) Voltage-Mode CMs

When considering the circuit implementation of V-CMs, they are common for compensating feedback circuits such as amplifiers, phase-locked loops (PLLs) and power converters by employing the well-known Miller effect [27]–[29]. According to Fig. 4(a), the ef-fective capacitance of the input is capacitor C multi-plied by a factor of 11Av. The remarkable advantage of V-CM is its convenience in obtaining a large effec-tive capacitance value from a small physical capaci-tor. Yet, the voltage at the output might be pulled up or down to the power rails since the amplifier is normally a high-gain stage. The circuit is also suscep-tible to instability if there is no extra feedback loop applied to control the dc operating point, as shown in Fig. 4(b) [4]. The feedback circuitry calls for extra ele-ments and increases the power. Figure 4(c) suggests a

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circuit realization that overcomes this problem [28]. A non-inverting CMOS amplifier with a series-resistor feedback is able to solve the issue, but the multipli-cation factor is still limited by a small resistor ratio. Besides, an inverting unity-gain buffer is needed to ensure no input dc current because such dc current leads to large leakage and voltage spurs in PLLs. Al-though only a small multiplication factor is achieved, the V-CM shown in Fig. 3(d) exhibits a good balance between complexity, bandwidth, and quiescent cur-rent consumption [29]. Generally, V-CMs are unsuit-able for large-swing applications.

IEEE CIRCUITS AND SYSTEMS MAGAZINE

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2) Current-Mode CMs

The C-CMs shown in Fig. 5(a) have no similar restriction on the output voltage and, consequently, have gained

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0 IEEE CIRCUITS AND SYSTEMS MAGAZINE more attention recently, in realizing active filters, PLLs and DC-DC converters, than V-CMs. The current-mir-ror based structure depicted in Fig. 5(b) obtains ac-curate capacitance multiplication, owing to its inher-ent simplicity. Also, a large amplification factor can be achieved if the constraints of power consumption and the parasitic pole at the mirror are relaxed [20]. Cas-code current mirrors with long-channel transistors are utilized to minimize the leakage current at the output [30]–[34]. To amplify a grounded capacitor, different implementations have been proposed [24], [35]–[38]. The method shown in Fig. 5(c) utilizes a voltage fol-lower and resistors with ratio k to emulate a current amplifier. Thus, an equivalent capacitance is obtained by the value of C2 multiplied by k. But large resistors are required to minimize the current leaking into the follower’s output terminal. Since the current through the terminal X of the second generation current con-veyor (CCII) is amplified and dumped out at the termi-nal Z, and the voltage at X also follows that at Y, the CCII befits both floating and grounded capacitors (only CCII1 is shown in Fig. 5(d)). Recently, in order to re-duce the area of a frequency synthesizer considerably, a capacitance multiplication factor of around 20003 is achieved in [39] by adopting a general impedance converter (GIC). However, these techniques are mainly targeted for low-frequency applications because the auxiliary components such as the voltage buffers in [24] and [28] introduce low-frequency parasitic poles that severely limit their frequency responses. Besides, the GIC requires two additional high-performance OpAmps and a big resistor of 2 MV, further aggravat-ing the overheads.

3) Enhanced Current-Mode CMs

The concept of enhanced C-CMs combining the ben-eficial characteristics of both V-CMs and C-CMs are depicted in Fig. 6(a). A current sensor composed of a low-impedance element (typically a current buffer) is employed to convert the input voltage Vi into current ii. ii is then amplified in the voltage domain by a cur-rent-to-voltage (I-V) converter. Next, a voltage to cur-rent (V-I) converter turns the amplified voltage back into current for further magnification. Since the realiza-tion of a simple I-V converter or V-I converter can be done by several transistors, the enhanced C-CMs induce less circuit overhead while achieving a high multipli-cation factor. The basic architecture of the proposed CM is depicted in Fig. 6(b). The – gm1 cell is as simple as a MOS transistor but the multiplication factor is as large as gm1ro1 (ro1 represents the output resistance of the previous I-V converter). However, gm1ro1 cannot be too large to make the effect of the parasitic pole

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P2 (formed at the input of the – gm1) obvious. Another todiode current into voltage in optical receivers [40], drawback of this structure is that the input impedance [41]. The resistive feedback across Mb not only en-of the current sensor is insufficiently low, which in-sures the input with low impedance 1/gmb (gmb is the troduces another parasitic pole P1 (formed by C1 and transconductance of Mb) but provides flexible output the input resistance of the current mirror). To push impedance approximately equal to Rb, which can be P1 at a much higher frequency, the implementations more accurately controlled than the output resis-in Figs. 6(c) and (d) utilize local feedbacks to reduce tanc …… 此处隐藏：6070字，全部文档内容请下载后查看。喜欢就下载吧 ……