ISL78010ANZ-T;ISL78010ANZ;中文规格书,Datasheet资料(3)

The ISL78010 is designed for continuous current mode, but it can also operate in discontinuous current mode at light load. In continuous current mode, current flows continuously in the inductor during the entire switching cycle in steady state operation. The voltage conversion ratio in continuous current mode is given by Equation 1:

AVDD1---------------=-------------VIN1–D

(EQ. 1)

where D is the duty cycle of the switching MOSFET.Figure 21 shows the block diagram of the boost regulator. It uses a summing amplifier architecture consisting of GM stages for voltage feedback, current feedback and slope compensation. A comparator looks at the peak inductor current cycle by cycle and terminates the PWM cycle if the current limit is reached.

An external resistor divider is required to divide the output voltage down to the nominal reference voltage. Current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network in the order of 60kΩ is recommended. The boost converter output voltage is determined by Equation 2:

R1+R2

AVDD=--------------------×VREF

R1

(EQ. 2)

Q2Q3Q4

The current through the MOSFET is limited to 2A peak. This restricts the maximum output current based on Equation 3:

ΔILVIN

IOMAX= ILMT–-------- ×--------- 2 VO

(EQ. 3)

Q5

Where ΔIL is peak to peak inductor ripple current, and is set

by Equation 4:

VIND

ΔIL=---------×----LfS

(EQ. 4)

where fS is the switching frequency.

ISL78010

VREFSGND

REFERENCEGENERATOR

EN

OSCILLATOR

COMP

OSC

LX

BUFFER

SLOPE

COMPENSATION

Σ

PWMLOGICCONTROLLER

FBB

GMAMPLIFIER

CINT

AMPLIFIER

CURRENTUVLO

VDDPG

THERMALSHUTDOWN

CDLY

SS

DRVN

FBN

0.4V

UVLO

COMPARATOR

UVLO

COMPARATOR

+-0.2V

VREF

SHUTDOWN

AND START-UPCONTROLEN

CURRENT REF

LIMIT COMPARATOR

VREF

+UVLO

COMPARATOR

SS+-PGND

DRVP

FBPDELB

DRVL

FBL

FIGURE 20.BLOCK DIAGRAM

ISL78010

CLOCK

SLOPE

COMPENSATION

SHUTDOWN AND STARTUP CONTROL

IFB

CURRENT AMPLIFIER

IREF

PWM LOGIC

BUFFER

LX

FBB

GM AMPLIFIER

VOLTAGE AMPLIFIER

REFERENCE GENERATOR

CINTPGND

FIGURE 21.BLOCK DIAGRAM OF THE BOOST REGULATOR

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ISL78010ANZ-T

ISL78010ANZ