comparing energy and latency of asynchronous and synchronous
NoC issues
2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
ComparingEnergyandLatencyofAsynchronousandSynchronousNoCsforEmbeddedSoCs
DanielGebhardt
SchoolofComputingUniversityofUtahgebhardt@cs.utah.edu
JunbokYouKennethS.Stevens
Dept.ofElectricalandComputerEngineering
UniversityofUtah
{jyou,kstevens}@ece.utah.edu
Abstract—Powerconsumptionofon-chipinterconnectsisaprimaryconcernformanyembeddedsystem-on-chip(SoC)appli-cations.Inthispaper,wecompareenergyandperformancechar-acteristicsofasynchronous(clockless)andsynchronousnetwork-on-chipimplementations,optimizedforanumberofSoCdesigns.WeadaptedtheCOSI-2.0frameworkwithORION2.0routerandwiremodelsforsynchronousnetworkgeneration.Ourowntool,ANetGen,speci estheasynchronousnetworkbydeterminingthetopologywithsimulated-annealingandrouterlocationswithforce-directedplacement.Itusesenergyanddelaymodelsfromour65nmbundled-datarouterdesign.SystemCsimulationsvariedtraf cburstinessusingtheself-similarb-model.Resultsshowthattheasynchronousnetworkprovidedlowermedianandmaximummessagelatency,especiallyunderburstytraf c,andusedfarlessrouterenergywithaslightoverheadfortheinter-routerwires.
I.INTRODUCTION
Embedded,energy-constrainedSoCdesignscanberoughlyseparatedintotwoclasses:platform-basedand xed-function(alsocalledapplication-speci c).Theformerisconcernedwithbeingabletoperformawidevarietyoftasks,manyofwhichcannotbeforeseenatdesigntime.Thelatteristargetedtowardsaparticularfunction,orafewfunctions,thathaveknownproperties.A xed-functiondesignmightconsistofanumberofhighlyspecializedcoresandmemories,andfewergeneral-purposeprocessors.Thenetwork-on-chip(NoC)ofboththeseclassesshouldbeoptimizedforminimalenergyusagewhilemeetingthepredictedperformancerequirements;however,theapplication-speci cNoCmaybemorespecializedasithasaprioriknowledgeofthecommunicationpatternsbetweencores.Thisisincontrasttogeneral-purposeinterconnectsthatareoftenevaluatedwithtraf cpatternssuchasspatially-uniform,bit-transpose,etc..Thedomainofthisworkisthe xed-function,ratherthantheplatform-basedSoC.
Someglobally-asynchronouslocally-synchronous(GALS)interconnectsolutionsrelyonaclock,eitherwithstandardsynchronousclockdistribution,oramesochronousmethod.However,anasynchronous(alsocalledclockless)networkhasanumberofpotentialadvantagesoveraclockednetworkinaGALSenvironment.Standardargumentsforasynchronouscir-cuitdesignincluderobustnesstoprocess/voltage/temperaturevariation,average-caseinsteadofworst-caseperformance,andothersuchpoints.However,therearealsomanyNoC-speci carguments.InasynchronousNoC,theclocktreeforallroutersandpipelinebufferscanconsumesigni cantpowerasshownin
aheterogeneousnetwork[1],andinalargeCMP(chipmulti-processor)33%ofrouterpower[2].ManySoCdesignshavequiteburstyand“reactive”traf c.Inthiscase,asynchronousmethodsarebene cialinthattheyconsumelittledynamicpowerduringperiodsoflowtraf cwithoutrelyingonclockgatingtechniques.
Availablebandwidthoneachasynchronouslinkcanbeindependentlyset,tosomeextent,bywirelengthbetweenrouters,linkpipelinedepth,orbyvaryingthephysicalwireproperties(metallayer,width,andspacing).Thisispotentiallyusefulwhenbandwidthrequirementsoncore-to-corepathsvaryconsiderably.Thisisincontrasttoclockednetworkswhichcommonlyuseasinglefrequencyforallroutersandiswastefultothosepathsnotrequiringhighbandwidth.AclockedNoCcanusediscrete“islands”ofdifferingclockspeedstoachieveasimilareffect,butinamuchcoarser-grainedfashion.
Designautomationtechniquesarecommonlyusedtogen-erateaNoCforaspeci cSoCdesign.Thesemethodscandecreasetimeofdevelopmentincommercialproductsorallowaresearchertoexplorealargerdesignspace.TheNoCsolutionischosenbasedonsomemetric,usuallyafunctionofenergyandperformance.Intheoptimizationprocess,potentialsolutionsmustbeevaluatedforquality,andthisoftenrequiresanabstractedmodeloftheSoCcharacteristics.
ThisabstractioncanbedoneatavarietyoflevelsdependinguponcompletenessoravailabilityoftheSoCdesignandNoCcomponents.Ideally,onecouldsimulatetheexactfunctionalityofthevariouscorescomposingthedesign,andtheNoCwouldbefullyimplementedtomodelthecommunication.Unfortu-nately,thismethodislaborandsimulation-timeintensive,andnotagoodchoiceforearly-explorationoftheNoCdesignspace.Asusual,tradeoffsmustbemadeasfunctionbecomesmoreabstracted.
Acommonlyusedabstractionusedintheliteraturehasbeentitledacommunicationtracegraph[3](CTG)oracoregraph.Apathdescribespairsofsourceanddestinationcores,andtheparticularlinksandroutersapackettraverses.TheCTGhasan-tupleofvaluesperpath,butoftenincludesaverageexpectedtraf crateperpathandsometimesalatencyrequirementofapacket.AnexampleCTGisshowninFigure1thatweuseinourevaluation.
Toourknowledge,theredoesnotexistpublishedmethodstoaidinautomatinghigh-levelasynchronousNoCoptimization
NoC issues
Figure1:ExampleCTGgraph.EdgeweightsareinMBytes/s.for xed-functionSoCs.Thisisincontrasttotechniquesthatutilizesynchronoustoolsforimplementingaspeci cnetwork[4].Inthiswork,wegiveanoverviewofourcircuitsanddesignautomationtechniques,andcomparetheresultingasynchronousNoCtoasynchronousonegeneratedbyanexistingtool.Wealsoshowthataddingameasureofburstytraf ctoaCTGdesignabstractionleadstoamoreconclusiveNoCevaluation.AlsouniqueisourSystemCsimulatorthatmodelsasynchronousrouters,andimportantly,thelinkdelayasafunctionofwirelengthbetweenrouters.
Thispaperisorganizedasfollows.SectionIIgivesanoverviewofrelatedwork.Thesynchronousnetworkgenera-tionframeworkisdiscussedinSectionIII.OurasynchronousrouterisdiscussedinSectionIVatacircuitlevel.SectionVdescribesourmethodologyforasynchronousNoCgenerationandsimulation.OurevaluationmethodologyandsetupisgiveninSectionVI,withtheresultsdiscussedinSectionVII.WeconcludeinSectionVIII.
II.RELATEDWORK
TheCOSIframework[5]generatesanapplication-speci cNoCand oorplan,takingasinputsuchconstraintsascoreareasandaveragebandwidthbetweencores.Whileitisexten-siblewithnewalgorithmsandcomponents,itdoesnotconsiderasynchro …… 此处隐藏:35852字,全部文档内容请下载后查看。喜欢就下载吧 ……
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