飞思卡尔新一代ARM Cortex-M4 32位MCU研讨会稿(3)

Single Precision Floating Point Unit

Freescale IP and InnovationFreescaleIPandInnovation

On-chip cache for instructions and data

Cross-Bar Switch for concurrent multi-master/slave accessing

On-chip DMA for CPU off-load p

Low-leakage Wake-up Unit adds flexibility for low power operation

Architected for Digital Signal Processing

Dotted boxes denote optional blocks

Motor Control-advanced algorithms, longer lifespan, power efficiency

Automation-high calculation and algorithm bandwidth at a low cost

Power managementPowermanagement–designed for low/battery designedforlow/batterypowered systems

Audio and Video–5x performance improvement over software, making batteries last longer

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc.,