ATMEGA2560V-8CU中文资料

Features

?High Performance, Low Power AVR? 8-Bit Microcontroller ?Advanced RISC Architecture

–135 Powerful Instructions – Most Single Clock Cycle Execution –32 x 8 General Purpose Working Registers

–Fully Static Operation

–Up to 16 MIPS Throughput at 16 MHz

–On-Chip 2-cycle Multiplier

?Non-volatile Program and Data Memories

–64K/128K/256K Bytes of In-System Self-Programmable Flash

Endurance: 10,000 Write/Erase Cycles

–Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

–4K Bytes EEPROM

Endurance: 100,000 Write/Erase Cycles

–8K Bytes Internal SRAM

–Up to 64K Bytes Optional External Memory Space

–Programming Lock for Software Security

?JTAG (IEEE std. 1149.1 compliant) Interface

–Boundary-scan Capabilities According to the JTAG Standard

–Extensive On-chip Debug Support

–Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface ?Peripheral Features

–Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

–Four 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode –Real Time Counter with Separate Oscillator

–Four 8-bit PWM Channels

–Six/Twelve PWM Channels with Programmable Resolution from 2 to 16 Bits

(ATmega1281/2561, ATmega640/1280/2560)

–Output Compare Modulator

–8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560)

–Two/Four Programmable Serial USART (ATmega1281/2561,ATmega640/1280/2560)–Master/Slave SPI Serial Interface

–Byte Oriented 2-wire Serial Interface

–Programmable Watchdog Timer with Separate On-chip Oscillator

–On-chip Analog Comparator

–Interrupt and Wake-up on Pin Change

?Special Microcontroller Features

–Power-on Reset and Programmable Brown-out Detection

–Internal Calibrated Oscillator

–External and Internal Interrupt Sources

–Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby

?I/O and Packages

–54/86 Programmable I/O Lines (ATmega1281/2561, ATmega640/1280/2560)

–64-pad QFN/MLF, 64-lead TQFP (ATmega1281/2561)

–100-lead TQFP, 100-ball CBGA (ATmega640/1280/2560)

–RoHS/Fully Green

?Temperature Range:

–-40°C to 85°C Industrial

?Ultra-Low Power Consumption

–Active Mode: 1 MHz, 1.8V: 510 μA

–Power-down Mode: 0.1 μA at 1.8V

?Speed Grade (see “Maximum speed vs. VCC” on page 377):

–ATmega640V/ATmega1280V/ATmega1281V:

0 - 4 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.7 - 5.5V

–ATmega2560V/ATmega2561V:

0 - 2 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.7 - 5.5V

–ATmega640/ATmega1280/ATmega1281:

0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V

–ATmega2560/ATmega2561:

0 - 16 MHz @ 4.5 - 5.5V 8-bit Microcontroller

64K/128K/256K Bytes In-System Programmable

ATmega640/V ATmega1280/V ATmega1281/V

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ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

Pin Configurations

Figure 1. TQFP-pinout ATmega640/1280/2560

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ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

Figure 2. CBGA-pinout ATmega640/1280/2560

Table 1. CBGA-pinout ATmega640/1280/2560.

1

2345678910A G N D AREF PF0PF2PF5PK0PK3PK6G N D VCC B AVCC PG5PF1PF3PF6PK1PK4PK7PA0PA2C PE2PE0PE1PF4PF7PK2PK5PJ7PA1PA3D PE3PE4PE5PE6PH2PA4PA5PA6PA7PG2E PE7

PH0PH1PH3PH5PJ6PJ5PJ4PJ3PJ2F VCC PH4PH6PB0PL4PD1PJ1PJ0PC7G N D G G N D PB1PB2PB5PL2PD0PD5PC5PC6VCC H PB3PB4RESET PL1PL3PL7PD4PC4PC3PC2J PH7PG3PB6PL0XT AL2PL6PD3PC1PC0PG1K

PB7

PG4

VCC

G N D

XT AL1

PL5

PD2

PD6

PD7

PG0

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ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

Figure 3. Pinout ATmega1281/2561

N ote:

The large center pad underneath the QF N /MLF package is made of metal and internally connected to G N D. It should be soldered or glued to the board to ensure good mechani-cal stability. If the center pad is left unconnected, the package might loosen from the board.

Disclaimer

Typical values contained in this datasheet are based on simulations and characteriza-tion of other AVR microcontrollers manufactured on the same process technology. Min.and Max values will be available after the device is characterized.

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ATmega640/1280/1281/2560/2561

2549K–AVR–01/07Overview

The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

Block Diagram

Figure 4. Block Diagram

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6ATmega640/1280/1281/2560/2561

2549K–AVR–01/07The AVR core combines a rich instruction set with 32 general purpose working registers.All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The ATmega640/1280/1281/2560/2561 provides the following features: 64K/128K/256K bytes of In-System Programmable Flash with Read-W hile-W rite capabilities, 4K bytes EEPROM, 8K bytes SRAM, 54/86 gen …… 此处隐藏：40397字，全部文档内容请下载后查看。喜欢就下载吧 ……