HP G4 QUANTA DAOR13MB6E0 R13

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8

R13 INTEL UMA/DISCRETE SYSTEM DIAGRAM 01+3V/+5V S5A A

PG.31

+1.05V_VTTPG.32

SODIMM1Max. 4GBPG.12

DDR3 Channel A

CPU CorePG.33~34

INTEL Sandy37.5mm X 37.5mm 989pin PGA TDP 35WPG.2~5

PCI-E x8

AMD Seymour23mm X 23mm TDP 15WPG.14~18

SODIMM2Max. 4GBPG.13

HDMI PG.21 CRTPG.22

DDR3PG.35

DDR3 Channel B

VCCSAB

FDISATA0PG.23

DMI

DDR3 800MHz

LVDS PG.20B

PG.36

VRAM64Mx16x4,64bitPG.19

ChargePG.37

HDD ODD

+VGACOREPG.39

SATA1PG.23

INTEL PCH COUGAR POINT

PCI-E x 1LANE1C

DP Port B CRT LVDS

LANEO

LANRTL8165EH 10/100PG.27

WLAN BT COMBOPG.30

USB 2.0PORT10

USB2.0 Ports Webcam X3PG.26 PG.20PORT4 PORT13

C

USB 2.0

PORT0,1,8

PCI-E x 1LANE2

BTPG.6~11

Card ReaderRTS5219PG.24

SoftbreezePG.26

KBCEnE KB3930QF A1D

LPCPG.29

AUDIO CODECIDT 92HD80BxPG.25

Speaker HP/MIC Analog MIC6

PG.25

Stackup TOP GND IN1 IN2 VCC BOTPROJECT: R13 Quanta Computer Inc.

D

KB

TP

ROM

FAN

PG.26

PG.25

NB51 2 3 4 5

Size Custom

Document Number

BLOCK DIAGRAMSheet 18

Rev 3A 1A of 39

Date: Saturday, September 18, 20107

5

4

3

2

1

Sandy Bridge Processor (DMI,PEG,FDI)U15A 6 6 6 6D

Sandy Bridge Processor (CLK,MISC,JTAG)U15B

MISC

DMI

6 6 6 6 6 6 6 6 6 6 6 6

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

B28 B26 A24 B23 G21 E22 F21 D21 G22 D22 F20 C21

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

29

EC_PECI

R386

43_4

H_PECI

THERMAL

PCI EXPRESS* - GRAPHICS

PEG_RX[0..7] 14 PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7

29,33 H_PROCHOT#

R146

56.2/F_4 H_PROCHOT#_R

DDR3 MISC

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32 J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32 M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25 M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7

7

H_SNB_IVB# SKTOCC#

SNB_IVB# SKTOCC#

SNB_IVB# N.A at SNB EDS#27637 0.7v1

TP4

AN34

CLOCKS

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

B27 B25 A25 B24

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO

J2

2 J21 H22

PEG_COMP

PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils. PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.PEG_RX#[0..7] 14

02D

C26

BCLK BCLK#

A28 A27

CLK_CPU_BCLKP 8 CLK_CPU_BCLKN 8

DPLL_REF_SSCLK DPLL_REF_SSCLK#

A16 A15

CLK_DPLL_SSCLKP CLK_DPLL_SSCLKN

TP2

TP_CATERR#

AL33

CATERR#

Placement close to EC.AN33 PECI SM_DRAMRST# R8CPU_DRAMRST#

AL32

PROCHOT#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

AK1 A5 A4

SM_RCOMP_0 R143 SM_RCOMP_1 R318 SM_RCOMP_2 R316

140/F_4 26.1/F_4 200/F_4

Intel(R) FDI

6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_FSYNC0 FDI_FSYNC1 FDI_INT FDI_LSYNC0 FDI_LSYNC1

A21 H19 E19 F18 B21 C20 D18 E17 A22 G19 E20 G18 B20 C19 D19 F17 J18 J17 H20 J19 H17

9,29 PM_THRMTRIP#

R148

0_4

PM_THRMTRIP#_R AN32

THERMTRIP#

FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3] FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3] FDI0_FSYNC FDI1_FSYNC FDI_INT FDI0_LSYNC FDI1_LSYNC

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils, SM_RCOMP[1] W:20mils/S:20mils/L: 500mils, SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,PRDY# PREQ# AP29 AP27 AR26 AR27 AP30 AR28 AP26XDP_PRDY# XDP_PREQ# XDP_TCLK XDP_TMS XDP_TRST# XDP_TDI_R XDP_TDO R375 TP12 TP11 TP8 TP10 TP13 TP39 TP7 *1K_4+3V

CPU XDP

PWR MANAGEMENT

6

PM_SYNC

R377

0_4

PM_SYNC_R

AM34

PM_SYNC

JTAG& BPM

TCK TMS TRST# TDI TDO

C

C_PEG_TX#0 C_PEG_TX#1 C_PEG_TX#2 C_PEG_TX#3 C_PEG_TX#4 C_PEG_TX#5 C_PEG_TX#6 C_PEG_TX#7

9

H_PWRGOOD

R378 R384

0_4 10K_4

H_PWRGOOD_R

AP33

UNCOREPW RGOOD

C

9/15 SI for H/W.+1.05V_VTT R404 R400 *75/F_4 *43_4

PM_DRAM_PWRGD_R V8

DBR# BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

AL35 AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

XDP_DBRST# XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7

XDP_DBRST# 6 TP40 TP41 TP43 TP42 TP5 TP45 TP44 TP46

SM_DRAMPW ROK

CPU RESET#8,14,24,27,29,30 PLTRST#

U18

3 2 1

GND OUT IN NC VCC

4

CPU_PLTRST#+3VS5 C560

CPU_PLTRST#_R

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